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primarysourced Photonics sector GF
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~7 min read · 1,718 words ·updated 2026-04-29 · confidence 60%

GF Fotonix process roadmap

Updated: 2026-04-29 Status: ✓ Verified roadmap milestones via GF press releases, OFC / CLEO conference papers, and customer co-disclosures. Forward-looking elements flagged ⚠ where speculative. Cross-references: Fotonix process overview · Fotonix PDK customers · AMF Singapore acquisition · customer roadmaps

1. Roadmap framing

GF does not publish a single “Fotonix roadmap” document the way TSMC publishes node roadmaps (N5 → N3 → N2 → A16) — Fotonix releases are communicated via:

  1. GF Newsroom blog posts — rolling updates on PDK refreshes, modulator topology additions, packaging features
  2. OFC / CLEO / IEEE Photonics conference papers — each year’s Fotonix invited papers contain the technical disclosure of incremental improvements
  3. Customer co-disclosures — when LWLG or NLM publishes a PDK milestone, GF’s process modifications are implicitly confirmed

This section assembles the discrete roadmap milestones into a coherent timeline.

2. Milestone history

DateMilestoneSource
2020First public 45CLO disclosure — 45 nm CMOS-SiPh monolithic technology demonstratedIEEE Xplore document 9083571 ✓; OFC 2020 T3H.3 ✓
2022-03-08GF Fotonix platform launch — branded productized 300mm monolithic SiPh + 300 GHz RF-CMOS; partner ecosystem revealed (Broadcom, Cisco, Marvell, NVIDIA, Macom, Ayar Labs, Lightmatter, Ranovus, PsiQuantum, Xanadu, Ansys, Cadence, Synopsys)GF press release ✓
2024 (mid-year)Next-generation Fotonix announced — modulator topology additions (MRM, RAMZM beyond MZM), packaging upgrades, PDK compact-model improvements, in-house test-capability additionsGF blog: Next-gen Fotonix ✓
2024 OFC”Latest Progress and Challenges in 300 mm Monolithic Silicon Photonics Manufacturing” invited paperOptica DOI ✓
2024 CLEO”300-mm monolithic CMOS silicon photonics foundry technology” invited overviewOptica DOI ✓
2025 (multiple dates)Enosemi silicon-validated EP design IP added to Fotonix PDKEnosemi-GF release ✓
2025-Q4Ayar Labs UCIe optical chiplet productizationAyar Labs UCIe announcement (2025-03-31) ✓
2025-11-17AMF Singapore acquired — adds 200mm SiPh capacity, AMF GP / HP processes, A*STAR Center-of-ExcellenceGF press release ✓
2026-03-16LWLG GDSFactory PDK live on Fotonix — first commercial productized EO-polymer modulator design flow on a 300mm SiPh foundry; slot-waveguide process optimization confirmed in progress at GFStocktitan LWLG-GF release ✓
2026-03-16NLM Photonics SOH PIC samples shipping on AMF GP; AMF HP PDK 6.0 in developmentNLM Photonics press release ✓
2026-Q2 (planned)Fotonix validation tape-outs at 200G / 400G per lane — LWLG modulator architectureStocktitan LWLG-GF release ✓
2026-2027 (planned)Marvell-Polariton POH plasmonic-modulator integration on FotonixMarvell-Polariton acquisition press release (2026-04-22) ⚠ Fotonix as the integration target inferred from Marvell’s existing GF-Fotonix relationship
2027+Fotonix Volume ramp on EO-polymer / SOH integrations⚠ Speculative; aligned with LWLG / NLM volume timelines

3. Forward roadmap — load-bearing process upgrades

3.1 Slot-waveguide process optimization for EO polymers (in progress)

The most consequential process upgrade currently in progress is the slot-waveguide structure optimization GF disclosed in the 2026-03-16 LWLG-GDSFactory release:

“GlobalFoundries is optimizing its 300mm process for advanced slot waveguide structures to support the device architecture…”

Why it matters:

  • Slot waveguides are a specific photonic-device geometry where the light-confining mode passes through a sub-wavelength gap that is filled with the EO-polymer chemistry (LWLG Perkinamine, NLM Selerion-class)
  • Without the slot, the polymer cannot interact strongly with the optical mode — the EO modulation efficiency collapses
  • Standard SiPh processes (TSMC SiPh, older Fotonix releases) do not optimize slot dimensions for polymer fill — they optimize for carrier-depletion silicon modulators, which use a doped junction inside a continuous waveguide
  • GF’s process modification is what enables the polymer-on-Fotonix volume path to be commercially viable

This is the single most important Fotonix process modification of 2025-2026 from an AI-photonics-thesis standpoint.

3.2 RAMZM and MRM modulator topology additions (already shipped)

The 2024 next-gen Fotonix announcement added Mach-Zehnder + ring-assisted Mach-Zehnder (RAMZM) + micro-ring (MRM) to the modulator library. Implications:

  • MRM enables high-density wavelength-division architectures (each ring is a single wavelength channel) — critical for 1.6T+ pluggables and CPO
  • RAMZM extends bandwidth beyond standard MZM by combining ring resonance with MZ interferometry
  • Customer impact: Marvell, Broadcom, Cisco transceivers can now choose modulator topology per channel without leaving Fotonix

3.3 AMF HP PDK 6.0 (in development)

Per the NLM Photonics 2026-03-16 release, GF is developing AMF HP PDK 6.0 as the next major release of the AMF advanced-process design kit. This is the integration vehicle for:

  • NLM Photonics’ second-generation Selerion-HTX silicon-organic hybrid (SOH) PIC
  • Other unnamed customers transitioning from AMF GP to AMF HP
  • Process modernization that brings AMF closer to GF’s productization standards (consistent metrology, EDA tool certification, customer-engineering support)

⚠ GA date for AMF HP PDK 6.0 not disclosed — likely 2026 H2 to 2027 H1 based on typical PDK rev cycles.

3.4 Co-packaged optics (CPO) packaging

GF has positioned Fotonix for CPO via:

  • 300mm wafer-level packaging compatibility
  • Far-BEOL V-groove fiber-attach
  • On-die / off-die laser source flexibility

Tower’s 2025-11-12 CPO foundry announcement and 300mm SiPh port suggest the CPO packaging substrate technology (glass interposer? organic? hybrid?) is now an active differentiation axis. ⚠ GF’s specific CPO substrate technology is not fully primary-sourced in this audit.

3.5 400 Gb/s next-generation materials (A*STAR CoE focus)

The Singapore Center of Excellence is explicitly chartered to research “next-generation materials for ultra-fast data transfer at 400 Gbps speed” (GF press release) ✓.

The candidate materials for a 400 Gb/s per lane modulator are:

  • EO polymers (LWLG Perkinamine NR, NLM Selerion-HTX) — proven 200-400 Gb/s class in research, productizing now
  • Thin-film lithium niobate (TFLN) — proven 400+ Gb/s class in research, less integrated with CMOS foundry flows
  • Plasmonic-organic hybrid (POH) — Polariton/Marvell platform, 1 THz BW class in research
  • Barium titanate (BaTiO3) or other Pockels-effect materials — research-stage

The CoE charter implicitly endorses EO-polymer + TFLN + POH as the candidate set. This is consistent with GF’s commercial moves (LWLG GDSFactory PDK; NLM SOH on AMF; Marvell post-Polariton path). ⚠ Specific A*STAR program names and material targets not yet publicly enumerated.

4. AMF process modernization plan

Post-acquisition, GF is integrating AMF into its broader portfolio:

WorkstreamStatus (Apr 2026)Source
AMF GP processActive commercial production; NLM Photonics 1.6T / 3.2T samplingNLM 2026-03-16 ✓
AMF HP processActive for second-gen NLM PICs; PDK in developmentNLM 2026-03-16 ✓
AMF HP PDK 6.0In developmentNLM 2026-03-16 ✓
A*STAR CoEEstablished; specific projects ⚠GF press release Nov 2025 ✓
300mm AMF migration”As market needs grow”; no announced timelineGF press release Nov 2025 ✓
AMF customer book transitionIn progress — existing AMF customer agreements transitioning to GF supply contracts⚠ no public detail

The pragmatic interpretation: AMF is being integrated, not absorbed-and-retired. GF is investing in AMF’s PDK, customer book, and Singapore CoE rather than migrating all AMF customers to Fotonix Malta.

5. Capacity expansion plans

Public capacity disclosure for Fotonix is sparse. What is known:

  • Fab 8 Malta NY is the primary 300mm Fotonix line; GF has not separately disclosed Fotonix dedicated capacity vs broader Fab 8 logic capacity. ⚠
  • Saratoga County NY photonics line: SemiAnalysis ◐ references this informally; ⚠ specific capacity numbers not primary-sourced.
  • AMF Singapore 200mm capacity — not publicly disclosed in wafer/year terms.
  • CHIPS Act / DoD funding: GF received CHIPS Act funding for Malta and Burlington VT expansion; the Fotonix-specific allocation is a subset that has not been individually disclosed. ⚠

The aggregate read is that capacity is not currently the binding constraint for the AI-photonics customer set — design-cycle timing and PDK readiness are the bottleneck. Once volume PDK validation closes (2026-2027), capacity becomes the next binding constraint and capex disclosure should follow.

6. Speculative — Fotonix 2.0?

Searching public sources, GF has not announced a “Fotonix 2.0” successor node. The structure of GF’s communications suggests:

  • Fotonix 1.0 / 45SPCLO is the productized flagship
  • 9WG is the cost-down variant
  • The 2024 “next-gen” update was a major-rev refresh, not a new node
  • The AMF HP PDK 6.0 is the next-gen path on the AMF process line

A future “Fotonix 2.0” would plausibly:

  • Move to a more advanced underlying CMOS node (22FDX FD-SOI, 12LP FinFET) for higher-bandwidth driver/TIA performance
  • Incorporate native EO-polymer or TFLN slot-waveguide structures
  • Add chiplet-style die-stacking compatibility (UCIe + photonics)
  • Target 800 Gb/s per lane as the headline data rate

⚠ All of this is speculative; no GF roadmap announcement supports this framing as of 2026-04-29. The only disclosed forward roadmap commitment is the A*STAR CoE 400 Gb/s materials research and the AMF HP PDK 6.0 GA.

7. Open audit items

  1. ⚠ Fotonix wafer capacity at Fab 8 — not publicly disclosed.
  2. ⚠ AMF HP PDK 6.0 GA timeline — known to be in development; no GA date.
  3. ⚠ CPO substrate technology specifics — glass / organic / hybrid not primary-sourced.
  4. ⚠ 300mm AMF buildout capex / timeline — committed in principle but no schedule.
  5. ⚠ Fotonix 2.0 / next major node — no public announcement; speculative.
  6. ⚠ CHIPS Act allocation to Fotonix-specific buildout — not separately disclosed.
  7. ⚠ A*STAR CoE specific project names and PIs — not enumerated.

8. Cross-references

Sources